From 52cefb04faf8cd78ec38514257f36ee718a66ad0 Mon Sep 17 00:00:00 2001 From: "Peter H. Froehlich" Date: Sun, 18 Oct 2015 19:44:35 -0400 Subject: [PATCH] Comment about APIC id versus CPU id confusion. --- mp.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/mp.c b/mp.c index 60c8a5a..01e4315 100644 --- a/mp.c +++ b/mp.c @@ -122,6 +122,13 @@ mpinit(void) p += sizeof(struct mpproc); continue; } + // TODO: The following is dubious at best. We enforce a rule that the + // APIC ids have to be consecutive, but the MP specification explicitly + // says that they DON'T have to be. As long as QEMU is used to simulate + // multiple SOCKETS everything seems fine, but as soon as we add CORES + // the code here breaks (and fails to identify them). The confusion + // between the id we assign here and the actual APIC id continues in + // ioapic.c for example. A rewrite is in order. if(ncpu != proc->apicid){ cprintf("mpinit: ncpu=%d apicid=%d\n", ncpu, proc->apicid); ismp = 0; -- 2.50.1